The present invention relates to a memory aggregation device and to a method for storing multiple input data streams in a set of FIFO memories and for retrieving multiple output data streams from the set of FIFO memories.
High speed hardware often requires an aggregation of many streams of data into a single stream of data. This is commonly done today using multiple FIFOs in the input of the system and a mechanism that schedules the traffic out as a single stream. This has a downside since the different FIFOs use different memories and these are not shared. This can cause a major waste of memory area on the chip.